TLA7000 Series Data Sheet

TLA7000 Logic Analyzers
The products on this datasheet are no longer being sold by Tektronix.

Read Online:

The modular TLA7000 logic analyzer series provides the speed and flexibility you need to capture logic detail on today's fastest designs. Pinpoint the source of elusive errors and gain the visibility you want with large easy-to-read displays, fast data throughput, and time-correlated views of analog and digital signals through the same probe.

Notice to EU customers

This product is not updated to comply with the RoHS 2 Directive 2011/65/EU and will not be shipped to the EU. Customers may be able to purchase products from inventory that were placed on the EU market prior to July 22, 2017 until supplies are depleted. Tektronix is committed to helping you with your solution needs. Please contact your local sales representative for further assistance or to determine if alternative product(s) are available. Tektronix will continue service to the end of worldwide support life.

Key performance
  • MagniVu™ acquisition technology provides up to 20 ps (50 GHz) timing resolution to find and measure elusive timing problems quickly
  • Up to 156 ps (6.4 GHz)/512 Mb Record length timing analysis
  • Up to 1.4 GHz Clock with up to 3.0 Gb/s Data with a Data Valid window of 180 ps for state acquisition analysis of high-performance synchronous buses
  • D-Max® probing system with 0.5 pF capacitive loading eliminates need for on-board connectors, minimizes intrusion on circuits, and is Ideal for differential signal applications
  • PCI Express Gen1 through Gen3 including Gen3 Protocol to physical layer analysis for link widths from x1 through x16 with up to 8.0 GT/s acquisition rates and up to 16 GB deep memory (for x16 link)
Key features
  • 68/102/136 channel logic analyzers with up to 512 Mb record length
  • Glitch and Setup/Hold triggering and display finds and displays elusive hardware problems
  • Transitional storage extends the signal analysis capture time for signals that transition infrequently
  • Simultaneous state, high-speed timing, and analog analysis through the same probe pinpoints elusive faults
  • Trace problems from symptom back to root cause in real time across multiple modules by viewing time-correlated data in a wide variety of display formats
  • Comprehensive PCI Express probing solutions, including midbus, slot interposer, and solder-down connectors
  • Modular mainframes provide flexibility and expandability
  • Broad processor and bus support
  • MIPI protocol analysis
  • DDR2 and DDR3 debug and verification
  • Signal integrity
  • PCI Express debug from Protocol layer to Physical layer
    • Silicon validation
    • Computer system validation
    • Embedded system debug and validation
  • Processor/Bus debug and verification
  • Embedded software integration, debug, and verification

Breakthrough solutions for real-time digital systems analysis

Tektronix provides breakthrough digital systems analysis tools that enable digital hardware and software designers to capture and analyze the source of elusive problems that threaten product development schedules. The TLA7000 Series provides the speed you need to capture the source of those elusive problems, plus the visibility you want with large displays and fast system data throughput, while protecting your investment with compatibility with all TLA modules.

TLA7012 and TLA7016 mainframes

The TLA7012 Portable and TLA7016 Benchtop mainframes are modular mainframes that accept TLA logic analyzer and pattern generator modules. The TLA7012 and TLA7016 can be configured as either master or expansion mainframes to provide solutions for large numbers of buses and high channel-count requirements.

The TLA7012 Portable Mainframe offers a familiar work environment for the TLA application software. It provides multiple display capability for extended desktop viewing, in addition to an internal DVD-RW, hard drive, and multiple USB ports for expansion. A replaceable hard drive is standard, ideal for security or enabling individual team members to store personal setups and data. Trigger in/out connections provide an interface to other external instrumentation, such as Tektronix oscilloscopes, for correlating measurement results.

TLA7BBx modules

Today's digital design engineers face daily pressures to speed new products to the marketplace. The TLA7BBx Series logic analyzer modules answer the need with breakthrough solutions for the entire design team, providing the ability to quickly monitor, capture, and analyze real-time digital system operation to debug, verify, optimize, and validate digital systems. Hardware developers, hardware/software integrators, and embedded software developers will appreciate the range of capabilities of the TLA7BBx Series logic analyzer modules. Its broad feature set includes capturing and correlating elusive hardware and software faults; providing simultaneous state, high-speed timing, and analog analysis through the same probe; using deep state acquisition to find the cause of complex problems; real-time, nonintrusive software execution tracing that correlates to source code and to hardware events; and nonintrusive connectorless probing.

The TLA7BBx Series logic analyzer modules offer breakthrough MagniVu™ technology by Tektronix for providing high-speed sampling (up to 50 GHz) that dramatically changes the way logic analyzers work and enables new measurement capabilities. The TLA7BBx modules offer high-speed state synchronous capture, high-speed timing capture, and analog capture through the same set of probes. They capitalize on MagniVu technology to offer up to 20 ps timing on all channels, glitch and setup/hold triggering, and display and time stamp that is always on at up to 20 ps resolution.

Module Timing resolution State speed Memory
TLA7BBx 20 ps (50 GHz) Up to 1.4 GHz Up to 64 Mb

P6800 and P6900 series probes

With the industry's lowest capacitance, the P6800 and P6900 Series logic analyzer probes protect the integrity of your signal - critical for connecting to fast buses like DDR2 and DDR3 where low intrusion is key to the proper operation of your design. Select from single-ended and differential probes and a variety of attachment mechanisms, including the "connectorless" compression connection that eliminates the need for onboard connectors.

For applications where circuit board space is at a premium, the high-density P6900 Series with D-Max®Probing Technology offers the industry's smallest available footprint. For debugging the signal integrity glitches common on fast buses, the P6900 Series works with the TLA7BBx modules and their iLink™ Tool Set capability to provide iCapture™ simultaneous digital-analog acquisition. This allows you to clearly see the time-correlated digital and analog behavior of your design, without the extra capacitance and setup time of double-probing.

For differential signaling applications where signal integrity is critical, the high-fidelity P6980 and P6982 are perfect for those applications where noise performance is critical. In addition, the P6980 and P6982 can support the small voltage swings that differential signaling often requires. The P6962DBL, when used with a TLA7000 Series logic analyzer with the TLA7BBx module, supports digital validation and debug of DDR3 memory with data rates up to 1600 mega-transfers per second. For board designs that do not include high-density probe footprints, the P6960 with its companion flying leadset provides the flexibility required to meet many different debug needs.

Customer Deskew fixture

For tight time alignment in both synchronous and asynchronous applications (including MagniVu), Tektronix recommends the Customer Deskew fixture. This is an optional accessory to the TLA7BBx modules that is used to perform a channel-to-channel deskew of the probes connected to the TLA7BBx module to ensure tight time alignment between all channels across all probes. Two different fixtures are available:

  • Customer Deskew fixture for P6800 series probes
  • Customer Deskew fixture for P6960 series probes

For ordering details, please see theOrdering informationsection.

TLA7SAxx PCI Express logic protocol analyzer modules

PCI Express 3.0 introduces new challenges for validation engineers. Time-to-market pressures require a solution that can quickly pinpoint problems. The TLA7SAxx Series logic protocol analyzer modules provide an innovative approach to PCI Express validation that spans all layers of the protocol from the physical layer to the transaction layer.

Reduce your time to information by viewing and searching up to 16  GB deep memory in just seconds with rapid display updates enabled by our industry-leading hardware acceleration. With improved information density you can then quickly ascertain the health of the system and identify patterns of interest (errors, specific transactions, ordered sets, etc.) with statistics using the Summary Profile window. Protocol behavior can be viewed at the packet and transaction level interspersed with physical layer activity in a single innovative Transaction window. Further insight into physical layer details can be gained with the unique Listing window showing packet details at the symbol level by lane and you can view individual lane activity correlated with analog waveforms from your high-bandwidth oscilloscope in the Waveform window.

Hardware developers, hardware/software integrators, and embedded system designers will appreciate the tight integration with the Tektronix Logic Analyzer. This provides visibility of complete system interactions with time-correlated, multibus analysis on a single display. Cross triggering and a common global time stamp enables accurate and efficient debugging by showing exactly what was happening on one bus relative to another at any given instant of time. Coupled with the P67SA00 Series probing solutions, engineers have flexible options for platform accessibility.

Refer to theTLASA00 Series Datasheet(52W-25691-xx) for additional information on the Tektronix PCI Express Logic Protocol Analyzer modules.

P67SA00 series probes for PCI Express

The P67SA00 series probes provide validation engineers with a comprehensive set of PCI Express probing solutions, including midbus, slot interposer, and solder-down connectors. With support for PCI Express Gen3 channel lengths up to 24 in. With two connectors, these probes offer minimal electrical loading with the highest signal fidelity and active equalization to ensure accurate data recovery of closed eyes. All P67SA00 series probes feature a graphical lane swizzling capability for maximum flexibility to accommodate unique circuit board layouts.

TLA7012 and TLA7016 Mainframe specifications

All specifications are guaranteed unless noted otherwise. All specifications apply to all models unless noted otherwise.

General characteristics
Instrument slots
Holds two TLA modules
Holds six TLA modules
Expansion capability
The TLA7000 Series mainframes can be used as either master or expansion mainframes (TL708EX 8-port Instrument Hub and Expander is required for 3-8 mainframes connected together using TekLink™ cable)
Up to eight TLA7012 mainframes can be used, providing support for up to 16 TLA modules (2,176 channels)
Up to eight TLA7016 mainframes can be used, providing support for up to 48 TLA modules (6,528 channels)
TLA7012 PC specifications
Operating system
Microsoft® Windows® 7 64-bit Ultimate
2.7 GHz i5 Processor
Intel® QM77
Two (2) 4 GB DDR3 1600 MHz SODIMMs
Line In and Mic Out connectors
Removable hard drive
500 GB, 3.5 in, SATA II, 7200 RPM
Optical drive
Internal 4.7 GB DVD±R/RW
External display
One DVI (2048 x 1536); one HDMI (1920 x 1200); one VGA (2048 x 1200)
Network port
Two (2) 10/100/1000 LAN with RJ-45 connector (Dual Gigabit Ethernet)
USB port
Seven (7); three (3) USB2 in front and four (4) USB3 in rear
TLA7012 integral controls
Front panel display
Size: 15 in. (38.1 cm) diagonal

Type: Active-matrix color TFT LCD with backlight

ion: 1024×768 

Front panel
General-purpose knob with dedicated hotkeys and knobs for horizontal and vertical scaling and scrolling
Available with Option 18 
Integrated View (iView™) capability
TLA mainframe configuration requirements
GPIB-iView™ (Opt. 1C)

USB-iView™ (Opt. 2C)

Number of Tektronix oscilloscopes that can be connected to a TLA system
External oscilloscopes supported
More than 100. For a complete listing of current supported oscilloscopes, please visit our website
TLA connections
USB, Trigger In, Trigger Out, Clock Out
Oscilloscope connections
GPIB-iView™ (Opt. 1C)
GPIB, Trigger In, Trigger Out, Clock In (when available)
USB-iView™ (Opt. 2C)
USB Device Port, Trigger In, Trigger Out
iView™ external oscilloscope wizard automates setup.
Data correlation
After oscilloscope acquisition is complete, the data is automatically transferred to the TLA and time correlated with the TLA acquisition data.
The oscilloscope and TLA data is automatically deskewed and time correlated when using the iView™ external oscilloscope cable.
GPIB-iView™ (Opt. 1C) External oscilloscope cable length
2 m (6.6 ft.)
USB-iView™ (Opt. 2C) External oscilloscope cable length
2 m (6 ft.)
Symbolic support
Number of symbols/ranges
Unlimited (limited only by amount of virtual memory available on TLA)
Object file formats supported
IEEE695, OMF 51, OMF 86, OMF 166, OMF 286, OMF 386, COFF, Elf/Dwarf 1 and 2, Elf/Stabs, TSF (If your software development tools do not generate output in one of the above formats, TSF, or the Tektronix symbol file, a generic ASCII file format is supported. The generic ASCII file format is documented in the TLA online help). If a format is not listed, please contact your local Tektronix representative.
External instrumentation interface
System Trigger output
Asserted whenever a system trigger occurs (TTL-compatible output, back-terminated into 50 Ω)
System Trigger input
Forces a system trigger when asserted (adjustable threshold between 0.5 V and 1.5 V, edge sensitive, falling-edge latched)
External Signal output
Can be used to drive external circuitry from a module's trigger mechanism (TTL-compatible output, back-terminated into 50 Ω)
External Signal input
Can be used to provide an external signal to arm or trigger any or all modules (adjustable threshold between 0.5 V and 1.5 V, level sensitive)
Voltage range/frequency
90-250 V AC at 45-66 Hz

100-132 V AC at 360-440 Hz

Input current
7 A maximum at 90 V AC (70 A surge)
Power consumption
750 W maximum
TLA7016 Voltage range/frequency
Ratings apply to mainframes with serial numbers B020000 and higher.
Configuration A, Maximum load 1000 W

100 Vrmsto 120 Vrms, 50 Hz to 60 Hz and 115rms, 400 Hz, 1450 W maximum

Configuration B, Maximum load 1000 W
120 Vrms to 240 Vrms, 50 Hz to 60 Hz, 1900 W maximum
Voltage range/frequency
100-240 V AC at 50-60 Hz
Input current
2 A maximum at 100 V AC
Power consumption
200 W maximum
+5 °C to +45 °C
-20 °C to +60 °C
20% to 80%
≤30 °C; 80% relative humidity (29 °C maximum wet-bulb temperature)
8% to 80% (29 °C maximum wet-bulb temperature)
Operating: -1,000 ft. to 10,000 ft. (-305 meters to 3,050 meters)
UL3111-1, CSA1010.1, EN61010-1, IEC61010-1 
TLA7012 Portable Mainframe physical specifications
295 mm (11.6 in.)
451 mm (17.75 in.)
460 mm (18.1 in.)
Net (without modules)
14 kg (30 lb.)
Shipping (typical)
27 kg (59 lb.)
TLA7016 Benchtop Mainframe physical specifications
350 mm (13.7 in.)
425 mm (16.7 in.)
673 mm (26.5 in.)
Net (without modules)
25 kg (55 lb.)
Shipping (typical
51.8 kg (115 lb.)
TLA708EX 8-port instrument Hub and expander physical specifications
51 mm (2.0 in.)
455 mm (17.5 in.)
305 mm (12.0 in.)
3 kg (6 lb.)
5 kg (11 lb.)
TLA7BBx logic analyzer module specifications

All specifications are guaranteed unless noted otherwise. All specifications apply to all TLA7BBx models unless noted otherwise.

General specifications
Number of channels
All channels are acquired including clocks
68 channels (4 are clock channels)
102 channels (4 are clock and 2 are qualifier channels)
136 channels (4 are clock and 4 are qualifier channels)
Channel grouping
No limit to number of groups or number of channels per group (all channels can be reused in multiple groups)
Module merging
Up to five 68-channel, 102-channel, or 136-channel modules can be "merged" to make up to a 680-channel module. Merged modules exhibit the same depth as the lesser of the five individual modules.

Word/setup-and-hold/glitch/transition recognizers span all five modules. Range recognizers limited to three-module merge. Only one set of clock connections is required.

Time stamp
54 bits at 20 ps resolution (>4 days duration)
Clocking/Acquisition modes
Asynchronous and synchronous. 20 ps (50 GHz) MagniVu high-speed timing is available simultaneous with all modes
Number of mainframe instrument slots required per TLA series module
Data input with P6800 or P6900 series probes
Capacitive loading
P6900 series
0.5 pF clock/data
P6800 series
<0.7 pF clock/data
P6810 (In group configuration)
1.0 pF
Threshold selection range
From -2.0 V to +4.5 V in 5 mV increments

Threshold presets include TTL (1.5 V), CMOS (1.65 V), ECL (-1.3 V), PECL (3.7 V), LVPECL (2.0 V), LVCMOS 1.5 V (0.75 V), LVCMOS 1.8 V (0.9 V), LVCMOS 2.5 V (1.25 V), LVCMOS 3.3 V (1.65 V), LVDS (0 V), and user defined.

Threshold selection channel granularity
Separate selection for each of the clock/qualifier and individual channels.
Threshold accuracy (including probe)
±(35 mV + 1%)
Input voltage range
2.5 V to 5.0 V
±15 V
Minimum Input Signal Swing
200 mV
VMAX – VMIN > 100 mV
Input signal minimum slew rate
200 mV/ns typical
State acquisition with P6800 or P6900 series probes
Channel configurations
Configuration Full channel Half channel
750 MHz Standard 750 MHz / 750 Mb/s (1 sample/clock) 750 MHz / 1.5 Gb/s (2 samples/clock) 750 MHz / 3 Gb/s (4 samples/clock)
1.4 GHz Optional 1.4 GHz / 1.4 Gb/s (1 sample/clock) 1.4 GHz / 2.8 Gb/s (2 samples/clock)
State record length with Time stamps
(Quarter/Half/Full channels) 4/2 Mb, 8/4 Mb, 16/8 Mb, 32/16 Mb, 64/32 Mb, 128/64 Mb per channel
Setup and Hold time selection range
From 15 ns before, to 7.5 ns after clock edge in 20 ps increments. Range may be shifted towards the setup region by 0 ns [+7.5, -7.5] ns, 2.5 ns [+10, -5] ns, or 7.5 ns [+15, 0] ns.
Setup and Hold window, single channel
180 ps typical
Minimum clock pulse width
200 ps (P6960, P6962, P6964, P6980, P6982, P6860), 250 ps (P6910)
Demux channel selection
Channels can be demultiplexed to other channels through user interface with 8-channel granularity.
Timing acquisition (with P6800 or P6900 probes)
MagniVu™ timing
20 ps max, adjustments to 40 ps, 80 ps, 160 ps, 320 ps, and 640 ps
MagniVu timing record length
128 Kb per channel, with adjustable trigger position
Deep timing resolution
(Quarter/Half/Full channels)

1.25 ps / 312.5 ps / 625 ps to 50 ms

Deep timing resolution with glitch storage enabled
1.25 ns to 50 ms
Deep timing record length
(Quarter/Half/Full channels)

8/4/2 Mb, 16/8/4 Mb, 32/16/8 Mb, 64/32/16 Mb, 128/64/32 Mb, 256/128/64 Mb per channel

Deep timing record length with glitch storage enabled
Half of default main memory depth
Channel-to-channel skew
(Module + probe)
Before customer deskew
±80 ps typical
After customer deskew
±20 ps typical
Minimum recognizable pulse/glitch width (single channel)
200 ps (P6960, P6962, P6964, P6980, P6982, P6860)

250 ps (P6910)

Minimum detectable Setup/Hold violation
40 ps
Minimum recognizable multichannel Trigger event
Sample period + channel-to-channel skew
Analog acquisition (with P6800 or P6900 probes)
3 HGz typical
10X, ±1%
Offset and gain (Accuracy)
±50 mV, ±2% of signal amplitude
Channels demultiplexed
Run/Stop requirements
None, analog outputs are always active
iCapture™ Analog outputs
Compatible with any supported Tektronix oscilloscope
iCapture Analog output BNC cables
Four (4) low loss, 10X, 36 in.
Trigger system
Independent Trigger states
Maximum idependent If/Then clauses per state
Maximum numger of events per If/Then clause
Maximum number of actions per If/Then clause
Maximum number of Trigger events
26 (2 counters/timers plus any 24 other resources)
Number of word recognizers
Number of transition recognizers
Number of range recognizers
Number of counters/timers
Trigger event types
Word, Group, Channel, Transition, Range, Anything, Counter Value, Timer Value, Signal, Glitch, Setup-and-Hold Violation, Snapshot
Trigger action types
Trigger Module, Trigger All Modules, Trigger Main, Trigger MagniVu, Store, Don't Store, Store Sample, Increment Counter, Decrement Counter, Reset Counter, Start Timer, Stop Timer, Reset Timer, Snapshot Current Sample, Goto State, Set/Clear Signal, Do Nothing
Maximum triggerable data rate
3.0 Gb/s
Trigger machine sequence rate
DC to 800 MHz (1.25 ns)
Counter/timer range
48 bits each (~4 days at 1.25 ns)
Counter rate
DC to 800 MHz (1.25 ns)
Timer clock rate
800 MHz (1.25 ns)
Counter/timer test latency
0 ns
Range recognizers
Double bounded (408 channel maximum). Can be as wide as any group, must be grouped according to specified order of significance.
Setup-and-hold violation recognizer setup time range
From 7.5 ns before, to 7.5 ns after clock edge in 20 ps increments. This range may be shifted toward the positive region by 0 ns, 2.5 ns, 5 ns, or 7.5 ns.
Setup-and-hold violation recognizer hold time range
From 7.5 ns before, to 7.5 ns after clock edge in 20 ps increments. This range may be shifted toward the positive region by 0 ns, 2.5 ns, 5 ns, or 7.5 ns.
Trigger position
Any data sample
MagniVu trigger postion
MagniVu position can be set from 0% to 60% centered around the MagniVu trigger
Storage control (data qualification)
Global (conditional), by state (start/stop), block, by trigger action, or transitional. Also force main prefill selection available.
Physical characteristics
262 mm (10.3 in.)
61 mm (2.4 in.)
381 mm (15.0 in.)
3.1 kg (6.7 lb.)
6.3 kg (13.7 lb.)
Last Modified: 2017-03-28 05:00:00

Download Manuals, Datasheets, Software and more:

Go to top